Public Beta v0.1.0 · MIT · ESP32

RivrReliable LoRa Mesh
for Embedded Systems

A lightweight networking layer and reactive dataflow runtime for LoRa radios. Resilient multi-hop communication on constrained embedded hardware. Runs on ESP32 + SX1262/SX1276. Zero heap allocation after boot.

869/915MHz
LoRa Bands
204
Tests Passing
Zero Heap
After Boot
What is Rivr?

A networking layer, not just radio firmware

Rivr is a LoRa mesh networking layer for embedded devices. Instead of building a single application on top of LoRa, Rivr provides a robust communication substrate that other systems can build upon.

On top of that substrate, Rivr ships a reactive dataflow DSL — describe packet processing pipelines in a few lines of code, compiled on-device at boot, evaluated on every incoming frame. No OS, no garbage collector, no heap.

No infrastructure required
Self-organizing nodes, no gateways
Deterministic behavior
Fixed memory footprint at compile time
Airtime-aware routing
EU868 duty-cycle compliance built in
Fuzz-tested protocol
Every packet validated before routing
Radio robustness
SX1262 driver auto-recovers from BUSY lockups and RX silence
Mesh safety
Loop detection, TTL limits, and routing storm prevention
Read the documentation →
Node A
Node B
Node C
Node D
Node E
Features

A full networking stack, not just a radio wrapper

Rivr ships a complete, production-ready mesh platform: reactive pipelines, EU868 duty-cycle compliance, signed OTA updates, and rich diagnostics — all running bare-metal on ESP32.

Core

Reactive Dataflow DSL

Describe packet-processing pipelines in a few lines of code. Compiled on-device at boot, evaluated on every frame with bounded worst-case latency.

Deterministic

Zero Heap After Boot

All engine state lives in BSS. Memory footprint is fully determined at compile time — no OS, no garbage collector, no heap.

EU868 Duty-Cycle Limiter

1-hour sliding window, 512-slot ring buffer with LRU eviction. Per-service airtime budgets and flood-deduplication built in.

Multi-Mode Mesh Routing

Flood routing (TTL / hop / dedupe) + unicast with reverse-path cache + 16-slot pending queue. Three-tier next-hop selection with EWMA RSSI/SNR scoring.

Smart

Rivr Fabric

Congestion-aware relay suppression for repeater nodes. 60-second sliding-window score prevents routing storms on busy meshes.

Security

Signed OTA Updates

PKT_PROG_PUSH delivers a new RIVR program over the mesh. Ed25519-signed, anti-replay protected, hot-reloaded from NVS without a full reflash.

Easy

Browser Flash Tool

Flash firmware directly from your browser using WebSerial. No drivers, no CLI tools required. Supports all 6 hardware variants.

OLED Display + Diagnostics

SSD1306 128×64 with 7 auto-rotating pages: overview, RF stats, routing table, duty-cycle, VM state, neighbours, and Fabric. Export @SUPPORTPACK for bug reports.

Services

Application Services

Built-in CHAT, TELEMETRY, MAILBOX, and ALERT services with structured @CHT / @TEL / @MAIL / @ALERT JSON log records and an 8-entry LRU mailbox store.

BLE

BLE Transport Bridge

Optional NimBLE edge interface using Nordic NUS UUIDs. Same binary Rivr frames over Bluetooth LE as over LoRa. Three activation modes (boot window, button, app-requested).

Runtime

Policy Engine

@PARAMS runtime updates for beacon interval, TX power, relay throttle, and node role — no reflash needed. Optionally HMAC-SHA-256 signed for authenticated policy pushes.

Architecture

Four real code layers

Rivr is written in C and Rust. The C firmware handles radio and routing; the Rust core compiles and evaluates DSL pipelines at runtime — completely allocation-free after boot. Host tools run on Linux, macOS, and Windows.

Host Tooling (Rust)

rivr_host: host-side tools for compiling, replaying, and signing RIVR programs.
rivrc CLIReplay Enginerivr_decoderivr_sign
L4

DSL Runtime (Rust no_std)

rivr_core: no_std Rust library — parses, compiles, and evaluates .rivr pipelines.
ParserCompilerVM EngineC FFI Bridge
L3

Firmware Core (C)

firmware_core + rivr_layer: C firmware — radio, routing, duty-cycle limiter, policy engine, OTA.
Radio ISR DriverMesh RoutingEU868 Duty-CyclePolicy / OTA
L2

Hardware

Physical hardware: ESP32 processor, SX126x/SX127x radio, optional OLED and BLE interface.
ESP32 MCUSX1262 / SX1276SSD1306 OLEDBLE (NimBLE)
L1
Hardware
Host Tools
Community

Built by the open-source community

Rivr is open source and community-driven. Contributions, bug reports, and field-testing results are highly appreciated. Check out the companion app for Android, Linux, and Windows too.

Ready to get started?

Flash Rivr to your ESP32 board in minutes and join the mesh.